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Identifying the Causes of DDR Data Corruption and Elusive Failures

技术概述

The InfiniiScan zone qualify trigger is a tool that can help you to track the signals. If the event can be observed, it can be tracked. You can set a tracking condition by drawing a “must intersect” or “must not intersect” zone directly on your signal on the oscilloscope screen. This allows you to easily isolate the signal of interest and track a specific error or event. Some examples can be observed in Figure 1 and 2. Using a logic analyzer with a memory bus decoder provides extensive triggering and storage qualifications for protocol decode of memory transactions. The DDR protocol-decode software in the logic analyzer allows users to input system attributes such as burst length, CAS and additive latency, as well as chip selects to decode the key DDR bus signals. Using these attributes, the software then presents a display that lists the transaction type, address, data and command conditions. Protocol-decode software also supports user-defined symbols that can be easily added to the state listing display. This software allows you to decode and view transactions, commands, and data from a DDR2 or DDR3 memory bus in your target system. This combination provides memory bus triggering, debug and compliance verification measurements to help you find protocol violations within your system such as read or write to an interactive bank row, refresh command to an active bank, or bank row must be pre-charged before being activated. The data is decoded and displayed at any desired level of detail from the protocol to binary. The protocol-decode software then translates acquired signals into easily understood bus transactions, at the full bus speed.   The Protocol-decode software allows you to track and fix infrequent glitches and other signal anomalies that might otherwise be difficult to find.

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Column Control DTX