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The use of BGA probes for probing DDR DRAM is becoming more popular and almost a requirement as memory design gets more complex and compact and data rate gets higher. DDR3 and DDR4 data rate is increasing from 800MT/s to possibly 3200MT/s. Memory system designers now have huge concerns on current DDR BGA probing design meeting the high bandwidth requirement for best signal fidelity. Signal fidelity is important for making accurate DDR measurement for compliance as per JEDEC specification. Memory designers also need to make signal integrity measurement for margin testing. Margin gained from removing DDR BGA probing effect can be used in less tolerant components in the design. This paper describes a new probe correction method used to extend the bandwidth of the DDR BGA probe to provide more margins in signal integrity testing and minimize error introduced by the DDR BGA probe.
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