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PCIe 5.0 - The Next Generation of Peripheral Component Interconnect

PCIe 5.0 - The Next Generation of Peripheral Component Interconnect

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Defining the Next Standard in Interconnect Technology

PCI Express 5.0 represents the latest in PCI standards using non-return to zero (NRZ) signaling; doubling the PCIe 4.0 speed from 16 GT/s to 32 GT/s. The PCIe 5.0 standard is on a fast track for development as the PCISIG (PCI Special Interest Group) — the standard body which controls the PCI Express standard — has tasked the team to complete the PCIe 5.0 rules by the end of 2019.

Originally, the parallel PCI bus’s purpose was to extend the functionality of standard personal computers and allow for the addition of networking cards, graphic cards, and other peripheral interfaces. PCI Express represents a high-speed, differential, serial version of I/O technology that shares significant roots with the old PCI bus. In all cases, the PCI and PCI Express standard’s intent is for high-volume manufacturing with low material costs for PC Boards and connectors. The PCI Express standard successfully meets this goal with speeds of 2.5 GT/s, 5 GT/s, and 8 GT/s. But PCI Express 4.0 at 16 GT/s, the latest speed enhancement to the standard, has proved to be more difficult for adoption by the PC industry.

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