!!!!    6    0    1  986495715  Vbbf7                                         

! Device          : 74ls396
! Function        : Octal Storage Register
! revision        : B.01.00
! safeguard       : standard_lsttl
! Modifications   : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

sequential

vector cycle  500n
receive delay 400n

assign   VCC         to pins  16
assign   GND         to pins  8

assign   D4_D0       to pins  12,9,6,3
assign   D4          to pins  12
assign   D3          to pins  9
assign   D2          to pins  6
assign   D1          to pins  3

assign   CLOCK       to pins  7
assign   STROBE      to pins  15

assign   OUTPUTS     to pins  14,13,11,10,4,5,1,2
assign   Two_Q4      to pins  14
assign   One_Q4      to pins  13
assign   Two_Q3      to pins  11
assign   One_Q3      to pins  10
assign   Two_Q2      to pins  4
assign   One_Q2      to pins  5
assign   Two_Q1      to pins  1
assign   One_Q1      to pins  2

family    TTL

power          VCC,GND

inputs         D4_D0, D1, D2, D3, D4, CLOCK, STROBE

outputs        OUTPUTS
outputs        Two_Q4, One_Q4, Two_Q3, One_Q3
outputs        Two_Q2, One_Q2, Two_Q1, One_Q1

trace Two_Q4 to D4, CLOCK, STROBE
trace One_Q4 to D4, CLOCK, STROBE

trace Two_Q3 to D3, CLOCK, STROBE
trace One_Q3 to D3, CLOCK, STROBE

trace Two_Q2 to D2, CLOCK, STROBE
trace One_Q2 to D2, CLOCK, STROBE

trace Two_Q1 to D1, CLOCK, STROBE
trace One_Q1 to D1, CLOCK, STROBE
!***************************************************************
!***************************************************************

vector   Reset
         set   CLOCK    to "0"
         set   D4_D0    to "0000"
         set   STROBE   to "0"
end vector

vector   Keep_Control
         set   CLOCK    to "k"
         set   D4_D0    to "kkkk"
         set   STROBE   to "k"
end vector

vector Clock_input
         initialize to Keep_Control
         set   CLOCK    to "T"
end vector

vector D4_D0__0101
         initialize to Keep_Control
         set   D4_D0    to "0101"
end vector

vector D4_D0__1010
         initialize to Keep_Control
         set   D4_D0    to "1010"
end vector

vector OUTPUTS_00000000
         initialize to Keep_Control
         set   OUTPUTS  to "00000000"
end vector

vector OUTPUTS_00110011
         initialize to Keep_Control
         set   OUTPUTS  to "00110011"
end vector

vector OUTPUTS_11001100
         initialize to Keep_Control
         set   OUTPUTS  to "11001100"
end vector

vector STROBE_high
         initialize to Keep_Control
         set   STROBE   to "1"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector   Reset_D1
         set   CLOCK    to "0"
         set   D1       to "0"
         set   STROBE   to "0"
end vector

vector   Reset_D2
         set   CLOCK    to "0"
         set   D2       to "0"
         set   STROBE   to "0"
end vector

vector   Reset_D3
         set   CLOCK    to "0"
         set   D3       to "0"
         set   STROBE   to "0"
end vector

vector   Reset_D4
         set   CLOCK    to "0"
         set   D4       to "0"
         set   STROBE   to "0"
end vector

vector   Keep_Control_D1
         set   CLOCK    to "k"
         set   D1       to "k"
         set   STROBE   to "k"
end vector

vector   Keep_Control_D2
         set   CLOCK    to "k"
         set   D2       to "k"
         set   STROBE   to "k"
end vector

vector   Keep_Control_D3
         set   CLOCK    to "k"
         set   D3       to "k"
         set   STROBE   to "k"
end vector

vector   Keep_Control_D4
         set   CLOCK    to "k"
         set   D4       to "k"
         set   STROBE   to "k"
end vector

vector Clock_input_D1
         initialize to Keep_Control_D1
         set   CLOCK    to "T"
end vector

vector Clock_input_D2
         initialize to Keep_Control_D2
         set   CLOCK    to "T"
end vector

vector Clock_input_D3
         initialize to Keep_Control_D3
         set   CLOCK    to "T"
end vector

vector Clock_input_D4
         initialize to Keep_Control_D4
         set   CLOCK    to "T"
end vector

vector STROBE_high_D1
         initialize to Keep_Control_D1
         set   STROBE   to "1"
end vector

vector STROBE_high_D2
         initialize to Keep_Control_D2
         set   STROBE   to "1"
end vector

vector STROBE_high_D3
         initialize to Keep_Control_D3
         set   STROBE   to "1"
end vector

vector STROBE_high_D4
         initialize to Keep_Control_D4
         set   STROBE   to "1"
end vector

vector D1_1
         initialize to Keep_Control_D1
         set   D1       to "1"
end vector

vector D1_0
         initialize to Keep_Control_D1
         set   D1       to "0"
end vector

vector D2_1
         initialize to Keep_Control_D2
         set   D2       to "1"
end vector

vector D2_0
         initialize to Keep_Control_D2
         set   D2       to "0"
end vector

vector D3_1
         initialize to Keep_Control_D3
         set   D3       to "1"
end vector

vector D3_0
         initialize to Keep_Control_D3
         set   D3       to "0"
end vector

vector D4_1
         initialize to Keep_Control_D4
         set   D4       to "1"
end vector

vector D4_0
         initialize to Keep_Control_D4
         set   D4       to "0"
end vector

vector One_Q1_1
         initialize to Keep_Control_D1
         set   One_Q1   to "1"
end vector

vector One_Q1_0
         initialize to Keep_Control_D1
         set   One_Q1   to "0"
end vector

vector Two_Q1_1
         initialize to Keep_Control_D1
         set   Two_Q1   to "1"
end vector

vector Two_Q1_0
         initialize to Keep_Control_D1
         set   Two_Q1   to "0"
end vector

vector One_Q2_1
         initialize to Keep_Control_D2
         set   One_Q2   to "1"
end vector

vector One_Q2_0
         initialize to Keep_Control_D2
         set   One_Q2   to "0"
end vector

vector Two_Q2_1
         initialize to Keep_Control_D2
         set   Two_Q2   to "1"
end vector

vector Two_Q2_0
         initialize to Keep_Control_D2
         set   Two_Q2   to "0"
end vector

vector One_Q3_1
         initialize to Keep_Control_D3
         set   One_Q3   to "1"
end vector

vector One_Q3_0
         initialize to Keep_Control_D3
         set   One_Q3   to "0"
end vector

vector Two_Q3_1
         initialize to Keep_Control_D3
         set   Two_Q3   to "1"
end vector

vector Two_Q3_0
         initialize to Keep_Control_D3
         set   Two_Q3   to "0"
end vector

vector One_Q4_1
         initialize to Keep_Control_D4
         set   One_Q4   to "1"
end vector

vector One_Q4_0
         initialize to Keep_Control_D4
         set   One_Q4   to "0"
end vector

vector Two_Q4_1
         initialize to Keep_Control_D4
         set   Two_Q4   to "1"
end vector

vector Two_Q4_0
         initialize to Keep_Control_D4
         set   Two_Q4   to "0"
end vector

!***************************************************************
!***************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D1.

unit   "awaretest test data storage D1 One Q1"
   execute Reset_D1
   execute D1_1
      execute Clock_input_D1
      execute Clock_input_D1
      execute Clock_input_D1
      execute Clock_input_D1
   execute One_Q1_1

   execute D1_0
      execute Clock_input_D1
      execute Clock_input_D1
      execute Clock_input_D1
      execute Clock_input_D1
   execute One_Q1_0
end   unit

unit   "awaretest test data storage D1 Two Q1"
   execute Reset_D1
   execute D1_1
      execute Clock_input_D1
      execute Clock_input_D1
      execute Clock_input_D1
      execute Clock_input_D1
   execute Two_Q1_1

   execute D1_0
      execute Clock_input_D1
      execute Clock_input_D1
      execute Clock_input_D1
      execute Clock_input_D1
   execute Two_Q1_0
end   unit

unit   "awaretest test data storage D2 One Q2"
   execute Reset_D2
   execute D2_0
      execute Clock_input_D2
      execute Clock_input_D2
      execute Clock_input_D2
      execute Clock_input_D2
   execute One_Q2_0

   execute D2_1
      execute Clock_input_D2
      execute Clock_input_D2
      execute Clock_input_D2
      execute Clock_input_D2
   execute One_Q2_1
end   unit

unit   "awaretest test data storage D2 Two Q2"
   execute Reset_D2
   execute D2_0
      execute Clock_input_D2
      execute Clock_input_D2
      execute Clock_input_D2
      execute Clock_input_D2
   execute Two_Q2_0

   execute D2_1
      execute Clock_input_D2
      execute Clock_input_D2
      execute Clock_input_D2
      execute Clock_input_D2
   execute Two_Q2_1
end   unit

unit   "awaretest test data storage D3 One Q3"
   execute Reset_D3
   execute D3_1
      execute Clock_input_D3
      execute Clock_input_D3
      execute Clock_input_D3
      execute Clock_input_D3
   execute One_Q3_1

   execute D3_0
      execute Clock_input_D3
      execute Clock_input_D3
      execute Clock_input_D3
      execute Clock_input_D3
   execute One_Q3_0
end   unit

unit   "awaretest test data storage D3 Two Q3"
   execute Reset_D3
   execute D3_1
      execute Clock_input_D3
      execute Clock_input_D3
      execute Clock_input_D3
      execute Clock_input_D3
   execute Two_Q3_1

   execute D3_0
      execute Clock_input_D3
      execute Clock_input_D3
      execute Clock_input_D3
      execute Clock_input_D3
   execute Two_Q3_0
end   unit

unit   "awaretest test data storage D4 One Q4"
   execute Reset_D4
   execute D4_0
      execute Clock_input_D4
      execute Clock_input_D4
      execute Clock_input_D4
      execute Clock_input_D4
   execute One_Q4_0

   execute D4_1
      execute Clock_input_D4
      execute Clock_input_D4
      execute Clock_input_D4
      execute Clock_input_D4
   execute One_Q4_1
end   unit

unit   "awaretest test data storage D4 Two Q4"
   execute Reset_D4
   execute D4_0
      execute Clock_input_D4
      execute Clock_input_D4
      execute Clock_input_D4
      execute Clock_input_D4
   execute Two_Q4_0

   execute D4_1
      execute Clock_input_D4
      execute Clock_input_D4
      execute Clock_input_D4
      execute Clock_input_D4
   execute Two_Q4_1
end   unit

unit  "unit1 test data storage"
   execute Reset
   execute D4_D0__0101
      execute Clock_input
      execute Clock_input
      execute Clock_input
      execute Clock_input
   execute OUTPUTS_00110011

   execute D4_D0__1010
      execute Clock_input
      execute Clock_input
      execute Clock_input
      execute Clock_input
   execute OUTPUTS_11001100
end   unit


unit  "unit2 test STROBE high"
   execute Reset
   execute D4_D0__0101
      execute Clock_input
      execute Clock_input
      execute Clock_input
      execute Clock_input
   execute OUTPUTS_00110011
   execute STROBE_high
   execute OUTPUTS_00000000
end unit

!End of test