!!!! 6 0 1 986418998 V89ec ! Device : mt5c6804 ! Function : Static RAM ! revision : B.01.00 ! safeguard : high_out_cmos ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." sequential vector cycle 400n receive delay 300n !+++++++++++++ Power ++++++++++++++! assign VCC to pins 28 assign GND to pins 14 !+++++++++++ No Connect +++++++++++! assign NC to pins 1 !+++++++ Address/Data Bus +++++++++! assign Address to pins 2,23,21,24,25,3,4,5,6,7,8,9,10 assign Data to pins 19,18,17,16,15,13,12,11 assign Data_D0 to pins 11 !AT Added for minimum pin test. assign Data_D1 to pins 12 !AT Added for minimum pin test. assign Data_D2 to pins 13 !AT Added for minimum pin test. assign Data_D3 to pins 15 !AT Added for minimum pin test. assign Data_D4 to pins 16 !AT Added for minimum pin test. assign Data_D5 to pins 17 !AT Added for minimum pin test. assign Data_D6 to pins 18 !AT Added for minimum pin test. assign Data_D7 to pins 19 !AT Added for minimum pin test. !++++++++++++ Control Pins ++++++++++++! assign CE1_bar to pins 20 assign CE2 to pins 26 assign WE_bar to pins 27 assign OE_bar to pins 22 family TTL power VCC,GND nondigital NC inputs Address,CE1_bar,CE2,WE_bar,OE_bar bidirectional Data bidirectional Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for minimum pin test. bidirectional Data_D4, Data_D5, Data_D6, Data_D7 !AT Added for minimum pin test. ! ! Disable Information ! disable Data with OE_bar to "1" disable Data with CE1_bar to "1" disable Data with CE2 to "0" ! ! Trace information ! when WE_bar is "0" inputs Data when WE_bar is "1" outputs Data when CE1_bar is "1" inactive Data when CE2 is "0" inactive Data !*****************************************************************************! !**********************Vector Definition Section******************************! !*****************************************************************************! vector Initial_Inputs set CE1_bar to "1" set CE2 to "0" set OE_bar to "1" set WE_bar to "1" end vector vector Keep_Control set CE1_bar to "k" set CE2 to "k" set OE_bar to "k" set WE_bar to "k" end vector vector Keep_Address initialize to Keep_Control set Address to "kkkkkkkkkkkkk" end vector vector Chip_enable1_true initialize to Keep_Control set CE1_bar to "0" end vector vector Chip_enable2_true initialize to Keep_Control set CE2 to "1" end vector vector Chip_enable1_false initialize to Keep_Control set CE1_bar to "1" end vector vector Chip_enable2_false initialize to Keep_Control set CE2 to "0" end vector vector Chip_disable initialize to Keep_Control set CE1_bar to "1" set CE2 to "0" end vector vector Chip_disable1 initialize to Keep_Control set CE1_bar to "1" set CE2 to "1" end vector vector Chip_disable2 initialize to Keep_Control set CE1_bar to "0" set CE2 to "0" end vector vector Chip_enable initialize to Keep_Address set CE1_bar to "0" set CE2 to "1" end vector vector Write_enable initialize to Keep_Address set WE_bar to "0" end vector vector Write_disable initialize to Keep_Control set WE_bar to "1" end vector vector Output_enable initialize to Keep_Address set OE_bar to "0" end vector vector Output_disable initialize to Keep_Control set OE_bar to "1" end vector vector Write_end initialize to Keep_Control set CE1_bar to "1" set CE2 to "0" set WE_bar to "1" end vector vector Read_end initialize to Keep_Control set CE1_bar to "1" set CE2 to "0" set OE_bar to "1" end vector vector Address_0101010101010 initialize to Keep_Control set Address to "0101010101010" end vector vector Address_1010101010101 initialize to Keep_Control set Address to "1010101010101" end vector vector Address_1001001001001 initialize to Keep_Control set Address to "1001001001001" end vector vector Address_0100100100100 initialize to Keep_Control set Address to "0100100100100" end vector vector Address_0011001100110 initialize to Keep_Control set Address to "0011001100110" end vector vector Address_1100110011001 initialize to Keep_Control set Address to "1100110011001" end vector vector Address_1000100010001 initialize to Keep_Control set Address to "1000100010001" end vector vector Address_0100010001000 initialize to Keep_Control set Address to "0100010001000" end vector vector Dataw_10101010 initialize to Keep_Address drive Data set Data to "10101010" end vector vector Dataw_01010101 initialize to Keep_Address drive Data set Data to "01010101" end vector vector Dataw_10010010 initialize to Keep_Address drive Data set Data to "10010010" end vector vector Dataw_01001001 initialize to Keep_Address drive Data set Data to "01001001" end vector vector Dataw_00100100 initialize to Keep_Address drive Data set Data to "10010010" end vector vector Dataw_11001100 initialize to Keep_Address drive Data set Data to "11001100" end vector vector Dataw_00110011 initialize to Keep_Address drive Data set Data to "00110011" end vector vector Dataw_10001000 initialize to Keep_Address drive Data set Data to "10001000" end vector vector Dataw_00000000 initialize to Keep_Address drive Data set Data to "00000000" end vector vector Datar_10101010 initialize to Keep_Address receive Data set Data to "10101010" end vector vector Datar_01010101 initialize to Keep_Address receive Data set Data to "01010101" end vector vector Datar_10010010 initialize to Keep_Address receive Data set Data to "10010010" end vector vector Datar_01001001 initialize to Keep_Address receive Data set Data to "01001001" end vector vector Datar_00100100 initialize to Keep_Address receive Data set Data to "10010010" end vector vector Datar_11001100 initialize to Keep_Address receive Data set Data to "11001100" end vector vector Datar_00110011 initialize to Keep_Address receive Data set Data to "00110011" end vector vector Datar_10001000 initialize to Keep_Address receive Data set Data to "10001000" end vector vector Datar_00000000 initialize to Keep_Address receive Data set Data to "00000000" end vector vector Datar_11111111 initialize to Keep_Address receive Data set Data to "11111111" end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector Dataw_D0_0 initialize to Keep_Address drive Data_D0 set Data_D0 to "0" end vector vector Dataw_D0_1 initialize to Keep_Address drive Data_D0 set Data_D0 to "1" end vector vector Dataw_D1_0 initialize to Keep_Address drive Data_D1 set Data_D1 to "0" end vector vector Dataw_D1_1 initialize to Keep_Address drive Data_D1 set Data_D1 to "1" end vector vector Dataw_D2_0 initialize to Keep_Address drive Data_D2 set Data_D2 to "0" end vector vector Dataw_D2_1 initialize to Keep_Address drive Data_D2 set Data_D2 to "1" end vector vector Dataw_D3_0 initialize to Keep_Address drive Data_D3 set Data_D3 to "0" end vector vector Dataw_D3_1 initialize to Keep_Address drive Data_D3 set Data_D3 to "1" end vector vector Dataw_D4_0 initialize to Keep_Address drive Data_D4 set Data_D4 to "0" end vector vector Dataw_D4_1 initialize to Keep_Address drive Data_D4 set Data_D4 to "1" end vector vector Dataw_D5_0 initialize to Keep_Address drive Data_D5 set Data_D5 to "0" end vector vector Dataw_D5_1 initialize to Keep_Address drive Data_D5 set Data_D5 to "1" end vector vector Dataw_D6_0 initialize to Keep_Address drive Data_D6 set Data_D6 to "0" end vector vector Dataw_D6_1 initialize to Keep_Address drive Data_D6 set Data_D6 to "1" end vector vector Dataw_D7_0 initialize to Keep_Address drive Data_D7 set Data_D7 to "0" end vector vector Dataw_D7_1 initialize to Keep_Address drive Data_D7 set Data_D7 to "1" end vector vector Datar_D0_0 initialize to Keep_Address receive Data_D0 set Data_D0 to "0" end vector vector Datar_D0_1 initialize to Keep_Address receive Data_D0 set Data_D0 to "1" end vector vector Datar_D1_0 initialize to Keep_Address receive Data_D1 set Data_D1 to "0" end vector vector Datar_D1_1 initialize to Keep_Address receive Data_D1 set Data_D1 to "1" end vector vector Datar_D2_0 initialize to Keep_Address receive Data_D2 set Data_D2 to "0" end vector vector Datar_D2_1 initialize to Keep_Address receive Data_D2 set Data_D2 to "1" end vector vector Datar_D3_0 initialize to Keep_Address receive Data_D3 set Data_D3 to "0" end vector vector Datar_D3_1 initialize to Keep_Address receive Data_D3 set Data_D3 to "1" end vector vector Datar_D4_0 initialize to Keep_Address receive Data_D4 set Data_D4 to "0" end vector vector Datar_D4_1 initialize to Keep_Address receive Data_D4 set Data_D4 to "1" end vector vector Datar_D5_0 initialize to Keep_Address receive Data_D5 set Data_D5 to "0" end vector vector Datar_D5_1 initialize to Keep_Address receive Data_D5 set Data_D5 to "1" end vector vector Datar_D6_0 initialize to Keep_Address receive Data_D6 set Data_D6 to "0" end vector vector Datar_D6_1 initialize to Keep_Address receive Data_D6 set Data_D6 to "1" end vector vector Datar_D7_0 initialize to Keep_Address receive Data_D7 set Data_D7 to "0" end vector vector Datar_D7_1 initialize to Keep_Address receive Data_D7 set Data_D7 to "1" end vector vector Address_0000000000000 initialize to Keep_Control set Address to "0000000000000" end vector !++++++++++++++++ Subroutines +++++++++++++++++! ! ! Subroutine: Write sub Write(Address,Data) execute Address execute Chip_enable execute Write_enable execute Data execute Write_end end sub ! Subroutine: Read sub Read(Address,Data) execute Address execute Chip_enable execute Output_enable execute Data execute Read_end end sub ! Subroutine: Read_disabled sub Read_disabled(Address,Data,Chip_disable) execute Address execute Chip_disable execute Output_enable execute Data execute Read_end end sub !*****************************************************************************! !************************ Vector Execution Section ***************************! !*****************************************************************************! !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with D0. unit "awaretest D0 Test" execute Initial_Inputs call Write(Address_0000000000000,Dataw_D0_0) call Read(Address_0000000000000,Datar_D0_0) call Write(Address_0000000000000,Dataw_D0_1) call Read(Address_0000000000000,Datar_D0_1) end unit unit "awaretest D1 Test" execute Initial_Inputs call Write(Address_0000000000000,Dataw_D1_0) call Read(Address_0000000000000,Datar_D1_0) call Write(Address_0000000000000,Dataw_D1_1) call Read(Address_0000000000000,Datar_D1_1) end unit unit "awaretest D2 Test" execute Initial_Inputs call Write(Address_0000000000000,Dataw_D2_0) call Read(Address_0000000000000,Datar_D2_0) call Write(Address_0000000000000,Dataw_D2_1) call Read(Address_0000000000000,Datar_D2_1) end unit unit "awaretest D3 Test" execute Initial_Inputs call Write(Address_0000000000000,Dataw_D3_0) call Read(Address_0000000000000,Datar_D3_0) call Write(Address_0000000000000,Dataw_D3_1) call Read(Address_0000000000000,Datar_D3_1) end unit unit "awaretest D4 Test" execute Initial_Inputs call Write(Address_0000000000000,Dataw_D4_0) call Read(Address_0000000000000,Datar_D4_0) call Write(Address_0000000000000,Dataw_D4_1) call Read(Address_0000000000000,Datar_D4_1) end unit unit "awaretest D5 Test" execute Initial_Inputs call Write(Address_0000000000000,Dataw_D5_0) call Read(Address_0000000000000,Datar_D5_0) call Write(Address_0000000000000,Dataw_D5_1) call Read(Address_0000000000000,Datar_D5_1) end unit unit "awaretest D6 Test" execute Initial_Inputs call Write(Address_0000000000000,Dataw_D6_0) call Read(Address_0000000000000,Datar_D6_0) call Write(Address_0000000000000,Dataw_D6_1) call Read(Address_0000000000000,Datar_D6_1) end unit unit "awaretest D7 Test" execute Initial_Inputs call Write(Address_0000000000000,Dataw_D7_0) call Read(Address_0000000000000,Datar_D7_0) call Write(Address_0000000000000,Dataw_D7_1) call Read(Address_0000000000000,Datar_D7_1) end unit unit "Test All" execute Initial_Inputs call Write(Address_1010101010101,Dataw_00110011) call Write(Address_0101010101010,Dataw_11001100) call Write(Address_1001001001001,Dataw_00100100) call Write(Address_0100100100100,Dataw_01001001) call Write(Address_0011001100110,Dataw_10010010) call Write(Address_1100110011001,Dataw_10001000) call Write(Address_1000100010001,Dataw_10101010) call Write(Address_0100010001000,Dataw_01010101) call Read(Address_1010101010101,Datar_00110011) call Read(Address_0101010101010,Datar_11001100) call Read(Address_1001001001001,Datar_00100100) call Read(Address_0100100100100,Datar_01001001) call Read(Address_0011001100110,Datar_10010010) call Read(Address_1100110011001,Datar_10001000) call Read(Address_1000100010001,Datar_10101010) call Read(Address_0100010001000,Datar_01010101) end unit !****************************************************************************! !The following unit "Test Chip Enables" tests the pins CE1_bar and CE2. ! !This unit is primarily for testing these pins on the 3065 test system as ! !the "unit disable tests" test these pins on the 3070 test system. In order ! !to use the unit "Test Chip Enables", the user must connect pull-ups to the ! !bidirectional data pins. ! !****************************************************************************! unit "Test Chip Enables" execute Initial_Inputs call Write(Address_1010101010101,Dataw_00000000) call Read(Address_1010101010101,Datar_00000000) call Read_disabled(Address_1010101010101,Datar_11111111,Chip_disable1) call Read(Address_1010101010101,Datar_00000000) call Read_disabled(Address_1010101010101,Datar_11111111,Chip_disable1) call Read(Address_1010101010101,Datar_00000000) call Read_disabled(Address_1010101010101,Datar_11111111,Chip_disable2) call Read(Address_1010101010101,Datar_00000000) call Read_disabled(Address_1010101010101,Datar_11111111,Chip_disable2) end unit !****************************************************************************! !If this test is to be used on the 3065 test system then the following two ! !"unit disable tests" must be commented out. ! !****************************************************************************! unit disable test execute Initial_Inputs call Write(Address_1010101010101,Dataw_00110011) call Read_disabled(Address_1010101010101,Datar_00110011,Chip_disable1) call Write(Address_1010101010101,Dataw_11001100) call Read_disabled(Address_1010101010101,Datar_11001100,Chip_disable1) end unit unit disable test execute Initial_Inputs call Write(Address_1010101010101,Dataw_00110011) call Read_disabled(Address_1010101010101,Datar_00110011,Chip_disable2) call Write(Address_1010101010101,Dataw_11001100) call Read_disabled(Address_1010101010101,Datar_11001100,Chip_disable2) end unit