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解决方案概述
800GE Validation Using IxVerify Virtual Solution and Synopsys ZeBu Emulator
SoC Verification Challenge
Networking system on chips (SoC) are quickly evolving into some of the largest SoC designs with port counts growing to hundreds, while throughput is reaching more than 24 terabits per second. In addition, they are increasingly designed to support a new class of workloads for data center, cloud, 5G, automotive, and artificial intelligence (AI). To achieve this, the latest networking SoCs are highly software programmable with increased complexity over billions of gates.
As the complexity increases, so does the risk of errors in hardware or software. Chip makers must address this risk in the pre-silicon stage by running realistic traffic scenarios that explore all critical use cases that will stress the SoC when deployed in future real-life environments. Not only does more of the validation need to happen in the pre-silicon stage, but the overall schedule also requires close coordination of SoC verification teams and post-silicon system validation teams.
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