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Separating Read and Write Signals for DDR DRAM

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Conventional Methods of Separation

 

To analyze the signal integrity of DDR signals, you need to differentiate the complex traffic on the data bus to independently analyze the signal performance for both DDR chip and memory controller.

 

Read and write data transfers are bi-directional on the same data bus (see Figure 1), making DDR validation a challenge. Read data transfer comes from the DRAM chip, while write data comes from the memory controller. When neither is transmitting, the bus reverts to highimpedance state. Unfortunately traditional methods used to separate read/write signals offer varying degrees of reliability.

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