FPGA Net Route Out with External Logic Analyzers
应用文章
Practical Tips For External Logic Analyzer FPGA Debug
Today’s design tools provided by FPGA vendors offer powerful debug capabilities through a variety of debug cores. Integrated logic analyzers allow for a designer to probe many internal FPGA nets and store captured signal traces in block RAM for analysis and viewing. Although these “inside the chip” tools are very useful, there are times when the deep memory capture available in an external logic analyzer or mixed-signal oscilloscope as shown in Figure 1 can be very helpful to discover the root cause of the failure in a prototype, or to view a particular operation in a design, such as capturing one complete video frame in a video processing design. Powerful debug-oriented trigger techniques are also helpful to trap bugs. Cross-triggering between internal tools and external test equipment further isolates improper target conditions to allow for quick debug. This application note will explore techniques for all of these topics.