Validation at the Edge: Pre-Silicon

Validation at the Edge: Pre-Silicon

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This executive insights handout serves as a companion resource to Episode 1 of Keysight's "Engineering at the Edge" webinar series, a four-part virtual event exploring next-generation system validation in 2026.

 

As data rates have doubled — DDR5 beyond 6400 MT/s, PCIe Gen7 at 128 GT/s, Ethernet to 1.6T, and optical at 448 Gbps — signal integrity margins have collapsed. At 224G and beyond, power delivery noise couples directly into signal behavior, and post-tape-out fixes have become prohibitively expensive. Validation must now happen before silicon exists, using high-fidelity models that correlate with lab measurement.

 

The handout addresses four critical pre-silicon validation challenges: simulating across domains before silicon exists, addressing chiplet and advanced packaging challenges, validating against industry standards early, and automating correlation with lab measurement.

 

Keysight solutions featured include PathWave Electronic Design Automation (EDA) Software for multi-domain simulation at sub-terahertz frequencies, Chiplet PHY Designer for evaluating link margins in disaggregated architectures, System Designer solutions for PCIe Gen7, USB4v2, and Ethernet standards compliance, and the M8199B Arbitrary Waveform Generator and DCA-M Sampling Oscilloscope for correlating pre-silicon models with real-world measurements at 224G and beyond.

 

The handout features a real-world success story: NTT Innovative Devices and Lumentum used Keysight's M8199B AWG and DCA-M Sampling Oscilloscope to validate signal behavior early, enabling 448 Gbps at 224 Gbd PAM4 and laying the path toward 3.2T AI interconnects.

This resource is designed for design engineers, signal integrity engineers, and technical decision-makers working on high-speed digital systems, optical interconnects, and AI infrastructure.

 

As part of the Engineering at the Edge series, this handout connects to subsequent episodes covering Lab Validation, Network Traffic Validation, and Manufacturing Validation across the entire engineering lifecycle.