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K8228A Silicon Nails Feature Development and Runtime, GTE 10.00p
The Silicon Nails test development tool also allows users to define the vectors that they would like to execute on the non-compliant boundary scan device. The test development tool will generate the boundary scan test to output or input at the relevant interconnecting pin, thus generating the test consistently.
The Silicon Nails test development tool also allows users to define the vectors that they would like to execute on the non-compliant boundary scan device. The test development tool will generate the boundary scan test to output or input at the relevant interconnecting pin, thus generating the test consistently.
HIGHLIGHTS
Boundary scan is a method for testing interconnections on printed circuit boards. Keysight’s Silicon Nails feature enables all the tools required to develop and execute tests on non-compliant boundary scan devices that are connected to boundary scan compliant devices on the printed circuit board.
During test development, the Silicon Nails test development tool references the digital test defined for the non-compliant boundary scan device. Then, it will generate a boundary scan test that drives the boundary scan devices on the chain to execute the test vectors onto the non-compliant boundary scan device. So, the tester is driving the non-compliant boundary scan device and testing it through the boundary scan chain.
The Silicon Nails test development tool also allows users to define the vectors that they would like to execute on the non-compliant boundary scan device. The test development tool will generate the boundary scan test to output or input at the relevant interconnecting pin, thus generating the test consistently.
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