The Package is Part of Your RF and Microwave Design
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Parasitic effects are unavoidable at higher frequencies, and must be considered part of the design. Transitioning from traditional front-end hybrids to wafer-level packaging (WLP) technology can reduce 60% cost and improve performance. Using WLP to replace hybrids means no bench tuning is possible. The critical RF paths through the 3D physical assembly must therefore be very accurately simulated with EM-circuit co-simulation to interactively tune and optimize performance in the presence of unavoidable parasitics. Learn how to design, assemble, route and simulate this kind of 3D wafer level packaging in this tutorial video.