Understanding Latency for Hardware-in-the-Loop Testing
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Modern vehicles, whether autonomous or assisted, rely heavily on positioning, navigation and timing (PNT) information. One of the greatest tools for developers of PNT-dependent systems is the inclusion of additional PNT sensors — usually working in concert with GNSS. The need for multiple sensors to work seamlessly together is not only increasing the importance of testing, but is bringing greater challenges to the requisite testing processes.
In a world where PNT information is routinely safety- and mission-critical, and where the GNSS receiver is just one part of a complex system of sensors, actuators, software applications, and algorithms, developers need to ensure that an integrated product continues to meet standalone performance parameters. One of the key methodologies available for vehicle, system, and sub-system developers and/or integrators is hardware-in-the-loop (HIL) testing, but this comes with its own set of challenges.
A HIL system brings together multiple systems, and often multiple test instruments. Each of these test instruments takes time to process inputs and issue corresponding commands to stimulate or emulate signals or outputs. This time is referred to as latency, and is a key issue for some HIL configurations. In this paper, we’ll look at what latency is, how it should be measured, and the impacts of increased levels of latency on a test setup.