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• 功能强大，使用灵活：内置基本测量，并可以根据需要添加其他测量套件。
• 结果始终如一：可以在设计阶段用于仿真和分析信号，在实验室中用于表征设计原型，还可以在生产和支持阶段远程操作设备。

除了 N1010A FlexDCA 软件具备的数据采集和基本测量功能之外，是德科技还提供了种类丰富、功能强大的软件工具：

• N1010100A，用于 FlexDCA 采样示波器软件的研发用套件：该套件专为研发工程师打造，帮助其表征设计，更深入地分析信号偏离预期性能的根本原因。 它包含 FlexRT 高级版软件，用于在 UXR 系列示波器上进行光测量。
• N1010200A，用于 FlexDCA 采样示波器软件的制造用套件：该套件提供了 FlexEye 等功能，可以提高测量灵活性，从而显著降低光收发信机制造应用的测试成本。 它包含 TDECQ 和 FlexRT 基础版等软件，用于在 UXR 系列示波器上进行光测量。
• N1010300A，用于 FlexDCA 采样示波器软件的信号完整性分析套件：该套件添加了功能强大的测量工具，可以测量阻抗和传输特征，计算 S 参数，以及进行基本的 TDR/TDT 测量；还添加了 FlexPLL 软件，可执行锁相环测量。
• FlexOTO 软件适用于对 800G/1.6T 和多通道应用执行高光通道数测试，以便改善测试效率，提高 DCA-M 硬件的使用率，同时也不会影响测量完整性。

如需确定传统 FlexDCA 功能选件与现有各个软件套件之间的对应关系，请参考 N1010x00A 分析套件映射表里的《DCA 配置指南》。

DDR3、DDR4、DDR5、LPDDR2、LPDDR3、LPDDR4、LPDDR5 和 GDDR6 分析

• 使用“事务解码”和“流量概况”视图快速处理和查看流量
• 在低功耗数据传输的事务解码之后的是自刷新进入/退出、多用途命令（MPC）、DDR4 3DS（DRAM 裸片 3 维堆叠）、LPDDR5 Bank 组织模式、速度变更和模式寄存器
• 查看数据速率和总线使用率 ％ 的性能计算结果和图形，通过图形滚动刷新窗口观察刷新速率，查看页面打开/关闭事务关联以及每个读取或写入事务所发送的数据
• 显示地址映射，查看由于刷新之间激活次数太多有出现 Row Hammer 问题风险的地址

DDR3、DDR4、DDR5、LPDDR2、LPDDR3、LPDDR4 和 LPDDR5 合规性验证

• 使用后期处理违规分析工具来测试存储速度变化时的协议违规
• 使用后期处理或实时处理工具来识别 DDR/2/3/4/5 或 LPDDR/2/3/4/5 状态机、协议合规性、协议级总线周期时序违规
• 使用实时违规分析工具自动执行实时 DDR2/3/4/5 或 LPDDR2/3/4/5 协议合规性测量和迹线捕获，节省大量时间
• 通过后期处理工具和实时处理工具的增强参数编辑界面，轻松地编辑 DDR2/3/4/5 或 LPDDR2/3/4/5 标准预置测试的参数

ONFi（开放式 NAND 闪存接口）分析工具

• 使用定制化功能，支持切换模式和专有的 NAND 协议。
• 使用精简的 ONFi 分析“时间线”视图，快速浏览多个 ONFi 目标。
• 使用 ONFi 事务的“详细信息”视图，将ONFi 操作视为序列中一组逻辑上关联的命令，从而节省时间

列出用于 DDR、DDR2、DDR3、DDR4、LPDDR、LPDDR2、LPDDR3 和 LPDDR4 的解码器

• 解码 DDR、DDR2、DDR3、DDR4、LPDDR、LPDDR2、LPDDR3 和 LPDDR4 命令以及 MRS 命令
• 包括 DDR4 RDIMM 和 LRDIMM 的 MRS 解码选项
• 使用用于 DDR/2/3/4 和 LPDDR/2/3 的物理地址触发工具，快速完成物理地址触发设置
   

Keysight B4661A 存储器分析软件提供了全套分析选件，包括创新的协议违规测试工具，可测试在存储速度变化时的违规；精简版流量概况视图，可快速查看逻辑分析仪迹线上关注的区域；强大的性能分析图；以及 DDR 和 LPDDR 解码器。 通过与 B4661A 存储器分析软件和是德科技逻辑分析仪*配合使用，用户可以监测 DDR/2/3/4/5、LPDDR2/3/4/5、GDDR6 或 ONFi 系统，调试并改善系统性能。 验证是否符合 DDR/2/3/4/5 和 LPDDR2/3/4/5 协议也是重要选项。 功能强大的流量概况、多种视图选择、实时违规触发可帮助用户识别难以捕获的 DDR/LPDDR 系统问题。

Keysight B4661A 存储器分析软件提供了四个标配软件功能和六个获得许可证的存储器分析选件。 2020 年 3 月发布的 6.70 版本增添了 GDDR6 分析功能（许可证选件 7FP/7TP/7NP）。
标配软件功能：

• 用于是德科技逻辑分析仪的 DDR 和 LPDDR 探测解决方案的默认配置
• DDR 设置助手
• DDR 眼图查找器/眼图扫描
• DDR 配置生成器
   

Compute Express Link (CXL) is an industry supported, high-speed interconnect standard that enables coherent memory access between a host and end-point device. CXL leverages the dependability and performance of the PCI Express® physical layer and uses a flexible processor port to auto-negotiation whether the link will communicate using the standard PCIe protocol or the supported alternate CXL transaction protocol. CXL defines three sub-protocols CXL.io, CXL.mem, and CXL.cache that are used for initialization and link-up, and to facilitate the coherent sharing of memory between computing devices.

P5561CXLA CXL 1.1 / 2.0 Protocol Exerciser Software supports protocol traffic generation for all CXL 1.1 and 2.0 supported speeds and lane widths from x1 to x16. The CXL exerciser can emulate a root port or endpoint, generate FLIT traffic and includes built-in LTSSM test cases, error insertion, and a protocol checker. The P5561CXLA software is used with the P5573A/74A/75A series of protocol exerciser hardware which is designed to be easy to setup, connect, and quickly configured to bring up the CXL link and check LTSSM and protocol functionality.

• Supports CXL 1.1 and 2.0 specifications for data rates up to 32 GT/s
• Generate traffic on link widths of x1, x2, x4, x8, x16
• Emulate a CXL host or any of the three CXL endpoint device types
• Generate CXL.io, CXL.mem, and CXL.cache transaction sub-protocols
• Protocol error checking
• Automated Link training with speed change skip and bypass support
• Support for Alternate Protocol
• Over 100 predefined LTSSM test cases
• Error insertion
• Combined Analyzer and Exerciser Software GUI
• Full featured API supporting Python, C++, and C#

The P5576PSWA PCIe 6.0 Protocol Analyzer Traffic Analysis Software combined with the P5570A Protocol Analyzer with its integrated, single add-in-card design, brings unparalleled test tools to the world of protocol traffic debugging for PCIe 6.0. The vast feature sets of the analyzer provide deep functionality for validation and debugging issues, while also providing improved data exchange between device and host. This not only completes all demands of PCIe 6.0 protocol testing in one simple and user-friendly interface but also reduces time and energy on rooting out and validating root causes.

LTSSM Overview

• Proper Link Training is critical to solid PCIe performance, and it is often the source of many issues.
• Physical differences in channels and products are manifested at the protocol layer via the LTSSM.
• The LTSSM Overview allows visual progression through the LTSSM and a decode of which state both the Upstream and Downstream ports are in at a given moment. The LTSSM Overview is a powerful tool for debugging one of the most difficult and complex aspects of PCIe protocol.

Lane View

• Lane view provides a view of exactly what data is appearing on which lane of the PCIe link.
• With a mouse over a particular lane shows what packet types individual bytes are associated with. Thus, in a single simple view, a comprehensive understanding of the protocol makeup is given.

Transaction Decode

• The Transaction Decode tab provides a detailed view of how individual packets are organized into a transaction. The initial packet operation, acknowledgement, and completion are condensed into a single line in the Transaction Decode view, which can easily be expanded to see each packet atomically. The transaction based view can be much more intuitive to look at than the chronological order of packets provided in the Packet view, and gives a deeper understanding of the protocol.

Powerful Triggering and Filtering

• The most difficult bugs to solve are intermittent with no obvious cause. Finding the root of these troublesome issues often involves setting up long capture times. But capturing lots of data is not helpful if it cannot effectively be analyzed. Scrolling through trace captures looking for specific issues that are obscured by retraining events and other protocol ‘storms’ is an ineffective use of time.
• Finely tuned triggering and filtering settings to be able to capture most interesting traffic. This avoids massive capture windows that scoop up unwanted data which slows down the analysis process both in porting the data to a PC for viewing as well as needlessly obscuring critical protocol events. The Keysight P5576A PCIe 6.0 Protocol Analyzer Traffic Analysis Software was designed with this use case in mind. As such, it provides both Simple and Advanced triggering modes. Simple triggers are provided that are quick to be applied and customized. Advanced Triggers can be configured to apply a chain of If/Then logic steps to the trigger. In this way specific protocol events can be captured easily, even if they occur only after a complex series of previous events that may span a long time period.
• To extend this capability even further filtering can be applied to ignore certain traffic events to extend the capture window without clogging up the capture log with unneeded data.

The P5577PSWA PCIe 6.0 Protocol Exerciser Traffic Analysis Software combined with the P5573A Protocol Exerciser, with its integrated, single add-in-card design, brings unparalleled test tools to the world of protocol traffic debugging for PCIe 6.0. The vast feature sets of the exerciser provides deep functionality for configuring traffic setup, while also providing improved data exchange with the analyzer. This not only completes all demands of PCIe 6.0 protocol testing in one simple and user friendly interface but also enables more focus on designing and automating unique test cases while saving amounts of time and energy.