D9042DPPC DisplayPort UHBR Transmitter Test Software

Keysight Technologies, Inc. DisplayPort UHBR Transmitter Test Software for Infiniium Series oscilloscopes provides a fast and easy way to debug and characterize the physical layer of DisplayPort designs for source ICs, motherboard systems, computers and graphics cards against the DisplayPort 2.1 Specification. D9042DPPC is the perfect tool for silicon validation engineers and its use is highly recommended to DisplayPort Authorized Test Centers.

Features

The DisplayPort UHBR Transmitter Test Software is a full-featured package to simplify the validation process of DisplayPort designs:

• Covers DisplayPort UHBR10, UHBR13.5 and UHBR20 speeds

• Supports Enhanced DP, Enhanced mDP and USB-C® connectors

• Full test automation with AUX channel controller

• Cable and test fixture embedding and de-embedding for accurate measurements

• Switching solution for automated multilane testing

• Supports D9010AGGC Compliance Test Measurement Server (Disaggregation)

Comprehensive Test Coverage

DisplayPort electrical testing is a complex task as it requires the connection of the product under test to the test instrument with specific test point access fixtures, the configuration and execution of advanced measurements and, finally, the evaluation of test results against the limits described in the specification. The sources of errors are too high to take any risks. The DisplayPort UHBR Transmitter Test Software greatly reduces the chances of failure and the time spent in testing by providing a guided setup and automated configuration of the test instrument and interpretation of test results. That way, you can leave the complexity of the test setup to the application and focus on the most important: the product under test.

Easy Test Setup

The DisplayPort UHBR Tx Test software blends the advanced measurements of Keysight’s Infiniium Series oscilloscopes with an intuitive user interface to provide unmatched testing capabilities. It is as simple as entering DUT attributes like connector type, lane under test and bitrates, and the application takes care of guiding the user though all necessary configuration steps to ensure the correctness of the test execution.

Equalization Optimization

The DisplayPort 2.1 Specification defines new, complex equalization schemes to compensate the channel effects, which become severe at the ultra-high bitrates. These comprehend transmitter FeedForward Equalization (FFE) on the DP Source, and receiver Continuous-Time Linear Equalization (CTLE) combined with Decision Feedback Equalization (DFE) on the DP Sink. In normal operation, the finetuning of the equalization settings during link training is key for an error-free communication.

DisplayPort defines two test points for Source testing: TP2 and TP3EQ. TP2 is located at the test interface on a mated Test Point Access fixture connected to the DP Source port. At TP2, the only equalization scheme present is the transmitter FFE. TP3EQ is located at the test interface on a mated Test Point Access fixture connected to the DP Sink port, using a defined cable model, with equalization enabled. At TP3EQ, all equalization schemes mentioned previously are present.

The DisplayPort UHBR Tx Test software gives you full control of the link equalization. The software can run an optimization, sweeping the transmitter FFE preset at TP2 and the transmitter FFE preset vs the receiver CTLE DC gain at TP3EQ. Then, the software will use the best settings for the Source tests based on the optimization criteria defined by the user: maximum eye height, eye width or eye area, or minimum inter-symbol interference or data-dependent jitter. If the user prefers to run the Source tests with predefined settings, it is also possible to enter them directly and skip the optimization phase.