Vectorless Test EP

New Power for Unpowered Test

The industry standard for unpowered test just got better. Keysight Technologies, Inc. Vectorless Test EP is patented technology that builds on the legacy of Keysight TestJet, combining next-generation test hardware and software to dramatically improve test coverage and reduce test development time. This capability is available only on the Keysight 3070 in-circuit test (ICT) platform.

- All-new measurement technology and methodology—capable of measuring the extremely low values required for testing today’s BGAs, micro-BGAs and SMT connectors

- Improved pin coverage—dramatic improvements over existing vectorless test techniques, includingKeysight TestJet

- Automatic debug software—sets limits, saves hours of test development time

-New hardware and software design—outstanding signal-to-noise characteristics for highly accuratemeasurements and greater defect coverage

- Robust sensor plates—longer hardware life, minimizes maintenance and replacement costs

Greater Coverage

Keysight Vectorless Test EP delivers up to 80 percent improvement in pins coverage on hard-to-test packages such as BGAs, micro-BGAs, and SMT connectors. The Keysight solution includes patented hardware and firmware-based noise reduction algorithms that enable highly sensitive measurements in the presence of noise down to 5 fF. Devices that have been either untestable or unstable using previous vectorless test techniques can now be easily tested with superior results using Vectorless Test EP (fig. 1).

Improve vectorless test coverage up to 80% on hard-to-test packages

- Improve test stability—superior measurement accuracy improves test stability on all pins

- Eliminate costly digital vector tests

- Ramp-up fast—same use-model and form-factor as TestJet, so existing 3070 fixtures can beretrofitted quickly

Better Measurement Accuracy

Vectorless Test EP provides excellent signal-to-noise characteristics on the Keysight 3070 ICT platform, so it can accurately identify the subtle differences between good solder joints and solder opens (fig. 2).

It can evaluate the lowest capacitive probe measurements on today’s state-of-the-art packages, which means fewer commented tests, better test coverage, fewer false failures and extremely stable tests.

- Reduce the number of commented tests

- Reduce false failures and false passes

- Improve test stability