RF SiP Design Verification Flow with Quadruple LO Down Converter SiP

This article outlines the design flow used for a System-in-Package component, using multiple die integrated into a single packaged device   

  The wireless industry trend toward higher integration and RF component miniaturization has been driving ongoing technology innovations, especially for substrate, interconnect, and packaging technologies. RF Systemin- Package (RF SiP) is one of those leading technology innovations. RF SiP is usually a sub-system unit, and it typically consists of multiple dies with or without passive components generally constructed from embedded passives (EP) and SMT technology. However some passive circuits can also be constructed from integrated passive device (IPD) technology, especially when space requirements are tight or a higher Q is needed. From a historical perspective, RF SiP is not a totally new technology because Multi- Chip Modules (MCM) and RF modules have been on the market for years and are considered an RF SiP technology. RF SiP typically provides better integration flexibility, faster time to market, and lower product development costs than System-on-Chip (SoC) by mixing and matching existing designs (ICs) and using best-in-class technologies. Nevertheless there are still ongoing debates about the strengths and future of SiP versus SoC. It is clear, however, that there is a very strong market demand for RF SiP. It is perhaps too early to predict which technology will dominate the market in the future, but it is fair to say that SiP will be a hot technology and market over the next several years. This article presents an RF SiP design verification flow with a quadrupled LO down converter  RF SiP. Agilent Technologies’ ADS (Advanced Design System) and EMDS (Electromagnetic Design System) are used to design the SiP. ADS includes circuit/system simulators and a layout package for RFICs, MMICs, RF boards, SI (Signal Integrity), RF SiP, and RF module applications. EMDS is 3-D, full-wave electromagnetic simulation software.    

SiP Market Segmentation 

The SiP market can be divided into three market segments with system content and complexity (or scale), as shown in Figure 1. From the system content standpoint, there are analog, mixed signal, and digital markets, and from the scale standpoint there are smallscale, medium-scale, and finally large-scale segments. The three market segmentations of SiP are therefore analog small-scale SiP, mixed signal medium-scale SiP, and digital large-scale SiP markets. RF SiP normally spans from analog small-scale to mixed signal medium-scale market segments. The typical products and applications for each market segment are PAM (power amplifier module), FEM (Front End Module), and ASM (Antenna Switch Module) for analog small-scale SiP; transceiver module and radio module for mixed signal medium-scale SiP; and lastly MCP (Multi Chip Packaging) type of applications for digital large-scale SiP. For the discussion in this article, we will only focus on RF SiP technology.    

 RF SiP Design Challenges 

Although there are many design challenges in RF SiP, these challenges can be grouped under three big categories. The first one is system level design challenges, where designers must create the best performing system architecture and optimize not only the system performance but also the development and manufacturing costs. The second category is package/interconnect design challenges, where 3-D package, substrate stackup, and die-to-die/die-to-package interconnect designs must be well understood. The last category is modeling challenges, where passive/active device models, vendor component libraries, statistical models, and behavior models must be accurately developed to shorten the RF SiP design cycle. There are many commercially available design tools in the market that help designers to address these issues. Agilent Technologies offers a complete set of design tools to address these design challenges for system/circuit level designs, package/interconnect designs, and modeling solutions.   

 TOPS Package TOPS (The Other Packaging System) is a package designed for a surface mount technology, and is suitable for packaging a line of ICs of up to 60 GHz without the complexity of wafer probe calibrations on the mixed transmission media of GCPW on PCB and microstrip on ceramic or GaAs. The SiP design example in this article uses this TOPS package. A cross-section view of the package is shown in Figure 2. It is similar to conventional QFN packages but it has much higher frequency performance characteristic. The package has a relatively small form factor, which is about 10 × 10 mm. The lid of the package is a non-hermetic air cavity with a molded liquid crystal polymer, and the substrate material is Rogers 4350 with metal backing. Figures 3 and 4 show the top and bottom side of the package respectively. The resulting TOPS package gives the best return loss performance in the DC to 60 GHz frequency range.

Quadrupled LO Down-Converter RF SiP Figure 6 shows the photo of a quadrupled LO downconverter SiP, which is similar to the one of conventional MCM type of modules. The system is basically a downconverter that converts 22~24 GHz RF input frequency to a fixed 1950-MHz intermediate frequency. However, the LO frequency is quadrupled by two multipliers. The signal paths for RF and LO are shown in Figure 7. For active circuits, existing MMIC chips are used, which are amplifiers, mixers, and multipliers. In addition to these active circuits, eight thin-film passive circuits on alumina substrate are specially designed to interconnect MMICs and perform necessary passive functions such as attenuation and power division. As discussed earlier, using SiP design, it was possible to design the system much faster by mixing and matching proven designs using the best-in-class technologies.   HeeSoo Lee holds a BSEE degree from the Hankuk Aviation University, Korea, and is an RF SiP/Module design flow specialist in Agilent’s EEsof EDA Division, where he is responsible for developing and promoting ADS/RFDE software solutions for RF SiP/Module market. He can be reached at [email protected] Dean Nicholson is a hardware R&D engineer at Agilent’s Electronic Measurements Group, where he is responsible for the development of advanced components for use in nextgeneration test instruments.