Addressing Challenges of High-Speed Digital I/O COTS Technologies
应用文章
The evolution to reconfigurable multipurpose radar, EW, and military communications systems to address tomorrow’s emerging threats is driving new system-level architectural and I/O requirements. In addition, supporting an increasingly networked infrastructure with high data throughput and low latency is becoming key for network- centric applications–all of which must be deployed faster and at a lower cost with today’s tightening budgets.
These trends are driving implementation changes from the system level down to digital components, including the digital interfaces that are used. Today’s systems increasingly rely on reconfigurable hardware such as field programmable gate arrays (FPGAs), digital signal processors (DSPs), and general-purpose processors (GPPs). High-speed I/O is needed to support high data rates between these devices, as well as memory, storage, and graphic processors/displays.