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Capture Highest DDR3 Data Rates Using Advanced Probe Settings onLogic Analyzers - Technical Brief

技术概述

Purpose of Advanced Probe Settings Mode

Keysight Technologies, Inc. logic analyzer module inputs are optimized to provide a flat input bandwidth from DC to the specified limit when used with Keysight probes designed with specific tip resistor capacitor networks.

Occasionally, probing techniques involve additional tip isolation resistors to interface to the system under test. System interfaces using additional tip isolation resistors, such as DDR BGA (Ball Grid Array) interposers, can provide additional high-frequency attenuation on the sampled signals to the logic analyzer. This additional attenuation can result in smaller data valid windows observed on the logic analyzer at DDR/LPDDR data rates over 1333 Mb/s. To compensate for this additional attenuation, Keysight has included a mode referred to as APS (Advanced Probe Settings) that peaks the edges of the input signals to the logic analyzer. This peaking can improve the capture window of signals to the logic analyzer.

As an example: Evaluation has shown larger data valid windows to the logic analyzer when using the APS mode with DDR BGA interposers at speeds of DDR3-1333 Mb/s and higher. The eye openings presented to the user from the sample positions window are enlarged (compared to eye openings without APS enabled). Larger eye openings allow the user to set sample positions for State mode capture for data rates up to DDR3 2400 Mb/s 1.

Depending on probing methods, APS mode may apply for DDR3/4 or LPDDR3/4 data rates over 1333 Mb/s. Keysight recommends that DDR3 Eyefinder/Eyescan be run with APS mode enabled and disabled to determine the best setting for individual target systems.

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