Testing Multilane MIPI M-PHY Transmitters
应用文章
As today’s mobile devices squeeze more components and subsystems into small, crowded spaces, considerations such as power supply delivery, heat dissipation, signal crosstalk and coupling become ever more prominent. In addition, the number of digital and RF circuits coexisting in these confined spaces increases the probability of electromagnetic interference (EMI).
The Mobile Industry Processor Interface (MIPI) Alliance promotes hardware and software standards in mobile designs to help ensure interoperability of devices and components. The latest physical layer, which is the M-PHY specification, has been adopted by a number of protocols, including DigRF v4, low latency interface (LLI), universal flash storage (UFS), camera serial interface (CSI), display serial interface (DSI), SuperSpeed USB inter-chip (SSIC), and Mobile PCI Express (M-PCIe). With so many protocols relying on it, validating the conformance of M-PHY is crucial—and getting more challenging with the spread of high-speed, multilane designs.